| • उत्सर्जक युग्मित तर्क | |
| emitter: उत्सर्जक | |
| coupled: युग्मित संयोजित | |
| logic: तर्क शास्त्र | |
emitter coupled logic मीनिंग इन हिंदी
emitter coupled logic उदाहरण वाक्य
उदाहरण वाक्य
अधिक: आगे- Emitter coupled logic is very fast but uses a lot of power.
- The hardware implementation of the HEP PEM was emitter coupled logic.
- A differential amplifier is used as the input stage emitter coupled logic gates and as switch.
- FASTBUS uses the Emitter coupled logic ( ECL ) electrical standard, which allows higher speed than TTL and generates less switching noise.
- The VAX 8600 had a CPU with an 80 ns cycle time ( 12.5 MHz ) implemented with emitter coupled logic ( ECL ) macrocell arrays ( MCAs ).
- The Skyline series is powered by Advanced CMOS-ECL ( ACE ), a Hitachi-developed technology that combines the high-density packaging of complementary metal oxide semiconductor ( CMOS ) and the speed of emitter coupled logic ( ECL ) on the same chip.
- The Ultra Port Architecture ( UPA ) signals are compatible with 3.3 V Low Voltage Transistor Transistor Logic ( LVTTL ) levels with the exception of differential clock signals which are compatible with 3.3 V pseudo emitter coupled logic ( PECL ) levels.